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2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com MSTM-SEC1 simplified control timing module us headquarters: 630-851-4722 european headquarters: +353-62-472221 general description the connor-winfield stratum sec1 (sdh equipment slave clock - option 1) control timing module acts as a complete system clock module for sdh slave clock timing applications. the mstm is designed for external control functions. full external control input allows for selection and monitoring of any of four possible operating states: 1) holdover; 2) external reference #1; 3) external reference #2; and 4) free run. table 1 illustrates the control signal inputs and corresponding operational states. in the absence of external control inputs (a,b), the mstm enters the free run mode and signals an external alarm. the mstm will enter other operating modes upon application of a proper control signal. mode 1 operation (a=1, b=0) results in an output signal that is phase locked to the external reference input #1. mode 2 operation (a=1, b=1) results in an output signal at or near the frequency as determined by the latest (last) locked- signal input values and the holdover performance of the mstm. free run modefree run mode operation (a=0, b=0) is a guaranteed output of 4.6 ppm of the nominal frequency. alarm signals are generated at the alarm output during holdover and free run operation. alarm signals are also generated by loss-of-lock, loss of reference, and a tune-limit indication from the pll. a tune- limit alarm signal indicates that the vcxo tuning voltage is approaching within 10% the limits of its lock capability and that the external reference input may be erroneous. a high level indicates an alarm condition. real time indication of the operational mode is available at unique operating mode outputs on pins 1-4. control loop filters effectively attenuate any reference jitter and smooth out phase transients.
preliminary data sheet #: tm029 p age 2 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice operating specifications table 3 par ameter specifications frequency range 16. 384 mhz, 19.44 mhz 2.0 power supply voltage 5 v dc (5%) supply current 60 ma typical at 16.384 mhz timing reference inputs 8 khz jitter and phase tolerance itu-t g813 7.3 wander generation itu-t g813 7.1 free run accuracy 4.6 ppm holdover stability 0.37 ppm 3.0 initial offset 0.05 ppm temperature 2.0 ppm drift 0.01 ppm/day holdover history 40 seconds pull-in / hold-in range 4.6 ppm minimum 4.0 lock time tbd tvl alarm 1 = warning: reference nearing operational limit 5.0 absolute maximum rating table 1 symbol parameter minimum nominal maximum units notes v cc power supply voltage (vcc to gnd) -0.5 - +7.0 v olts 1.0 v in input voltage with respect to g round -0.5 - vcc+0.5 volts 1.0 t stg storage temperature -65.0 - +150 c 1.0 input and output characteristics table 2 symbol parameter minimum nominal maximum units notes v ih high level input voltage (ttl compatible) 2.0 - vcc v v il low level input voltage (ttl compatible) 0 - 0.8 v t in input signal transition time - - 250 ns c in input capacitance - - 15 pf c out output capacitance - 50 - pf v oh high level output voltage @ i oh = -8.0 ma, vcc minimum 2.4 - - v v ol high level output voltage @ i ol = -8.0 ma, vcc minimum - - 0.4 v t hl clock out transition time high-to-low, no load - 4.0 - ns t lh clock out transition time low-to-high, no load - 4.0 - ns t rp input 8 khz reference signal positive pulse width 30 - - ns t rn input 8 khz reference signal negative pulse width 30 - - ns t op standard operating temperature 0 - 70 c
preliminary data sheet #: tm029 p age 3 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice pin assignment figure 1 block diagram figure 2 control inputs & operational states table 4 control input operational mode ref 1 ref 2 holdover free run pll_tvl alarm ab output 0 0 free run (default) 0 0 0 1 0 1 external normal 1 0 0 0 0 0 1 0 reference t une limit 1 0 0 0 1 1 #1 lor + lol 1 0 0 0 0 1 external normal 0 1 0 0 0 0 0 1 reference t une limit 0 1 0 0 1 1 #2 lor + lol 0 1 0 0 0 1 1 1 holdover 0 0 1 0 0 1 notes: 1.0 operation of the device at these or any other conditions beyond those listed under recommended operating conditions is not imp lied. exposure to absolute maximum ratings conditions for extended periods of time may affect device reliability. 2.0 consult factory for other output frequencies. 3.0 holdover stability is the cumulative fractional frequency offset containing initial offset, temperature, and drift components as described by itu-t g.813. 4.0 pull-in range is the minimum frequency deviation on the reference inputs to the timing module that can be overcome to pull itse lf into synchronization with the reference. 5.0 a ?1? level indicates unit is within the extreme 10% of its operating range tracking the reference (~11ppm). consult factory for use as a reference qualifier. 2:1 mux phase comparator dac filters dac tuning voltage monitor fifo sec vctcxo 2:4 mux ex ref 1 ex ref 2 alarm out pll tvl free run hold over pll tvl cntl a cntl b free run ref #1 ref #2 hold over lock and detection sync out
preliminary data sheet #: tm029 p age 4 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice pin description table 5 pin # pin name pin information 1 holdover output. high when the control inputs select holdover 2 ref 1 output. high when the control inputs select ex ref 1 3 ref2 output. high when the control inputs select ex ref2 4 free run output. high when the control inputs selects free run 5 gnd ground 6 alar m_out output. =1,if (free run + holdover + lor + lol + pll_tvl) 7 control a mode control input 8 control b mode control input 9 pll_tvl t uning voltage alarm. =1 if capture range near 10% of extreme (~11ppm) 10 gnd ground 11 sync_out synchronized output 12 gnd ground 13 n/c no connection 14 gnd ground 15 ex ref 2 external reference #2 input (8 khz) 16 gnd ground 17 ex ref 1 input. external reference #1 input (8 khz) 18 +5 vdc +5 volt dc supply
preliminary data sheet #: tm029 p age 5 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice typical application figure 3 input select mux mux mux mux system select bits system signal cw?s stm/mstm module cw?s stm/mstm module cw?s scg 2000/4000 cw?s scg 2000/4000 a b s y a b y s a b a b s y s y g timing card #1 timing card #2 line card 1 rcv rcv clock out clock out line card n target system under test possible choices include stanford research model: fs700 truetim e model xxx arbitrary w aveform generator external reference input arbitrary w aveform generator [n oise source] ds1 rate rz (1.544 mhz), e1 rate rz or 8 khz clock rz with noise m odulation tektronix sj300e clock or bits logic level clock input (ttl, cmos, etc.) hp53310a modulation analyzer / tim e interval analyzer d s 1 rate [1.544 m h z] b it s b ipolar phase error data output s a m ple w an d e r g e n e ratio n (t d e v ) fo r s t m /m s t m -s 3 100.0e-12 1.0e-9 10.0e-9 100.0e-9 1.0e-6 10.0e-3 100.0e-3 1.0e+0 10.0e+0 100.0e+0 1.0e+3 inte gration time (sec) tdev (se c tdev gr1244-fig5.1 gr1244-fig5-3 t ypica l res po ns e - 3000 s eco nd test - jitter a pplied (2 ui @ 10 h z) ref da te a p r 22 1998 kdh c o pyright 1998 c o nno r-w infield a lll rights res erved s a m p le m t ie d a ta fo r s t m -s 3 /m s t m -s 3 1.0e-9 10.0e-9 100.0e-9 1.0e-6 100.0e-3 1.0e+0 10.0e+0 100.0e+0 1.0e+3 10.0e+3 o bs erva tion tim e (s) mtie (s mtie 1 2 4 4 -5 .2 m a s k (a ) 1 2 4 4 -5 .2 m a s k (b ) 1 2 4 4 -5 .6 m a s k g r 2 5 3 - 5 .4 .4 .3 .2 copyright 1998 connor-winfield all rights reserved typical response - 3000 seco nd test - jitter applied (2 ui @ 10 h z) ref da te a p r 22 1998 kdh standards com pliance docum ents tim e-stam ped ensem ble based on absolute tim e reference (10mhz input) ds-1, oc-3, oc-12 electrical or optical signals w ander analyzer data (ieee-488) 10 mhz this device supplies system tim e inform ation. it can be thought of as supplying "absolute tim e" reference inform ation 10 mhz external reference input noise modulation input 10 mhz external reference input ieee-488 controller p latform for software hp 53305a phase analyzer hp e1748a sync measurem ent tektronix w ander analyzer 10 mhz external reference input timing card line card timing card oc-3 line card oc-12 line card oc-48 line card ds-1 line card . . . . ... m tie, tdev, w ander transfer, and w ander generation plots tektronix sj300e gps or loran timing source typical system test set-up figure 4
preliminary data sheet #: tm029 p age 6 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice typical wander generation mtie figure 6 10 100 1000 0.1 1 10 100 1000 10000 100000 1000000 o bservation tim e (sec.) mtie (ns) g r1244, fig 5.2 (a) g r1244, fig 5.2 (b) g r253-5.4.4.3.2, fig 5.17 m t ie (n s ) 1 10 100 1000 10000 0.01 0.1 1 10 100 1000 10000 integration time (sec.) tdev (ns) tdev (ns) gr1244, fig 5.3 typical calibrated wander transfer tdev figure 5
preliminary data sheet #: tm029 p age 7 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice typical wander generation tdev figure 7 0.1 1 10 100 0.1 1 10 100 1000 10000 in te g ra tio n t im e (s e c .) tdev (ns) tdev (ns) gr1244, fig 5.1 1 s phase transient tie figure 8 -200 0 200 400 600 800 1000 1200 012345678910 time (sec) tie (ns)
preliminary data sheet #: tm029 p age 8 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice entry into hold over figure 10 1 10 100 1000 10000 0.001 0.01 0.1 1 10 100 observation tim e (seconds) mtie (ns) gr-1244 objective, fig. 5-8 gr-1244 requirem ent, fig. 5-8 ty pic al m tie typical phase transient mtie figure 9 1 10 100 1000 10000 0.01 0.1 1 10 100 1000 observation time (sec) mtie (ns) gr-253, fig. 5-19 m tie (ns)
preliminary data sheet #: tm029 p age 9 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice return from hold over figure 11 1 10 100 1000 10000 0.001 0.01 0.1 1 10 100 observation time (sec.) mtie (ns) gr-1244 requirem ent, fig. 5-7 m tie (ns) ty pic al m tie
preliminary data sheet #: tm029 p age 10 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice 2 msec < t < 4.125 msec ? m change in operational mode operational mode indicator ? t m mstm-s3-tr mode indicator delay figure 12 ? t tvl limit high frequency tvl limit low frequency sync_out tvl alarm & alarm out 0 < t < 2.125 msec *the dac is updated only when the output changes level. the maximum update rate is 8 khz ? (nominal frequency) tuning voltage limit alarm timing diagram figure 13
preliminary data sheet #: tm029 p age 11 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice loss of reference timing diagram figure 14 external reference input alarm ton a toff a 2 msec < t on < 6.125 msec 0 msec < t off < 2.125 msec a a solder clearance figure 16 .030" pin land all solder and/or wire tags shall not extend more than .020" below pc board bottom surfac e .020" .020" max.
preliminary data sheet #: tm029 p age 12 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice module bakeout : do not bakeout the mstm-s3-tr w ashing recommenda tions: the mstm-s3-tr is not in a hermetic enclosure. it is recommended that the leads be hand cleaned after soldering. do not completely immerse the module. soldering recommenda tions: due to the sensitive nature of this part, hand soldering or wave soldering of the pins is recommended after reflow processes. power suppl y regula tion: good power supply regulation is recommended for the mstm-s3-tr the internal oscillators are regulated to operate from 4.75 - 5.25 volts. large jumps within this range may still produce varying degrees of wander. if the host system is subject to large voltage jumps due to hot-swapping and the like, it is suggested that there be some form of external regulation such as a dc/dc converter. via keep out area: it is recommended that there be no vias or feed throughs underneath the main body of the module between the pins. it is suggested that the traces in this area be kept to a minimum and protected by a layer of solder mask. see figure 18. solder mask: a solder mask is recommended to cover most the top pad to avoid excessive solder underneath the shoulder of the pin to avoid rework damage. see table 6 and figure 19. p ad construction: the recommended pad construction is shown in figure 18. for the pin diameter of .040? a hole diameter of .055? is suggested for ease of insertion and rework. a pad diameter of .150? is also suggested for support. this leaves a spacing of .050? between the pads which is sufficient for most signal lines to pass through. p ad arra y and p ad sp acing: the pins are arranged in a dual-in-line configuration as shown in figure 16. there is .2? space between the pins in-line and each line is separated by 1.6?. see figures 17 & 18 and table 6. mechanical outline: the mechanical outline of the mstm-s3-tr is shown in figure 17. the board space required is 2? x 2?. the pins are .040? in diameter and are .150? in length. the unit is spaced off the pcb by .030? shoulders on the pins. due to the height of the device it is recommended to have heat sensitive devices away where the air flow might not be blocked. ground and power suppl y lines: power specifications will vary depending primarily on the temperature range. at wider temperature ranges starting at 0 to 70 deg. c., an ovenized oscillator, ocxo, will be incorporated. the turn-on current for an ocxo requires a peak current of about .4a for about a minute. the steady state current will the vary from 50-150 ma depending on the temperature. it is suggested to plan for the peak current in the power and ground traces pin 18 and pin 5. the other four ground pins 10, 12, 14, and 16 are intended for signal grounds.
preliminary data sheet #: tm029 p age 13 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice package dimensions figure 17 0.200 [5.08 mm] 0.555 [14.10 mm] 0.200 [5.08 mm] 1.600 [40.64 mm] 2.000 [50.80 mm] 0.200 [5.08 mm] 2.000 [50.80 mm] 0.585 [14.86 mm] maximum height 0.200 [5.08 mm] 0.078 [1.98 mm] 0.040 [1.02 mm] 0.120 [3.05 mm] 0.045 [1.14 mm] via keepout area 0.200 2.000 2 . 0 0 0 1.600 0 . 2 0 0 i.d. ?0.055 finished hole o.d. ?0.150 copper pad pin #18 pin #1 0 . 2 0 0 recommended footprint dimensions figure 18 top side solder resist (over pad) pcb side view bottom side solder resist (up to pad) side assembly view figure 19 characteristic measurements table 6 characteristic item measurement (inches) pad to pad spacing 0.200 solder pad top o.d. 0.150 solder pad top i.d. 0.055 solder pad bottom o.d. 0.150 solder pad bottom i.d. 0.055 solder mask top dia. 0.070 solder mask bottom dia. 0.155 pin row to row spacing 1.600
preliminary data sheet #: tm029 p age 14 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice
preliminary data sheet #: tm029 p age 15 of 16 rev: p02 date: 09/07/01 ? copyright 2001 the connor-winfield corp. all rights reserved specifications subject to change without notice revision re vision date note p00 7/27/01 preliminary release p01 8/01/01 added por figure and tri-state pin p02 9/07/01 added power supply voltage to table 3
2111 comprehensive drive aurora, illinois 60505 phone: 630- 851- 4722 fax: 630- 851- 5040 www.conwin.com

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